Intel boasts three Ts

One teraflop, one terabyte and one terabit per second - the future of processors

One teraflop, one terabyte and one terabit per second — that’s the sort of performance Intel is promising future processors will deliver.

Speaking about these properties, the chip giant’s CEO, Paul Otellini, holds up a silicon-wafer disk with processor dies to prove that it’s possible today.

The performance estimates quoted come courtesy of a massively parallel processor, which has 80 cores packed into just 22 mm by 13.75 mm. It’s a highly integrated device, which uses the laser (or photonics) interconnects announced earlier, for high-speed data throughput, as well as directly connected memory.

The current generation of processors, from AMD and Intel, feature only two cores. Four-core variants from Intel are due in November, with both server and high-end consumer processors scheduled for release at that time. Mainstream and low-power four-core Core 2 Quad processors are scheduled for the first quarter of 2007, according to Otellini.

Intel has yet to power-up a single processor cut from the aforementioned wafer, which was made in its Irish fabrication plant. But CTO Justin Rattner says the company has a good track record for its first silicon wafer and expects it to work.

Despite Intel plugging energy-

efficiency hard at the moment, Rattner says the prototype chip has an estimated thermal output of 200 watts, at a speed of 3.16GHz, a figure that he states is “clearly too much”.

Rattner also discussed stacking the memory directly underneath the processor, stating that while Intel has been looking at other alternatives for connecting fast SRAM to the cores, this unconventional approach offered the best performance.

The new massively parallel processors are scheduled to be released in five years’ time. In that time-frame, Intel expects to have the optical interconnects ready for commercial production, using existing facilities, says Dr Mario Paniccia, Director of the Photonics Technology Lab at the chip-maker.

Intel is also looking at enclosing I/O devices, like network controllers, into the processor dies.

Saarinen travelled to San Francisco as a guest of Intel

Join the newsletter!

Or

Sign up to gain exclusive access to email subscriptions, event invitations, competitions, giveaways, and much more.

Membership is free, and your security and privacy remain protected. View our privacy policy before signing up.

Error: Please check your email address.

Tags intelchipprocessorCOREterabyteteraflops

More about AMDIntelPhotonicsTechnology

Show Comments
[]