Researchers tackle multi-core computer chip shortcomings

  • Bob Brown (Network World)
  • 27 May, 2011 01:42

Multi-core processors promise a big performance boost for servers, PCs and even smartphones, but much work remains to get the most out of these new chips. North Carolina State University researchers are among those seeking to maximize what multi-core processors have to offer.

They've modeled techniques designed to make multi-core processors more efficient by improving the way each core retrieves data from memory stored outside the chip. Models have been developed, using data from hardware counters on the chips, to determine which cores need more or less bandwidth.

FACEBOOK: "Like" our Alpha Doggs page on network research

"By better distributing the bandwidth to the appropriate cores, the criteria are able to maximize system performance," says Dr. Yan Solihin, associate professor of electrical and computer engineering and co-author with Fang Liu of a paper describing the research titled "Studying the Impact of Hardware Prefetching and Bandwidth Partitioning in Chip-Multiprocessors" that will be presented at the ACM SIGMETRICS 2011 event in San Jose the week of June 7. Researchers from Pennsylvania State University, the University of Texas at Austin and Syracuse University will also present papers on multi-core advances at the conference.

The research team has also analyzed how cores "pre-fetch" needed data in their caches, and come up with a better way to do this. It boils down to identifying when cores should pre-fetch and when they shouldn't, as grabbing the data early can sometimes clog up bandwidth unnecessarily.  Their work could result in manufacturers building chips whose cores can turn pre-fetching on or off automatically.

With multi-core processors even showing up these days in smartphones, vendors are scrambling to exploit the more powerful hardware. Microsoft, for example, is bolstering its .Net framework to make it easier for programmers to exploit multi-core processors.  The Multicore Association is also establishing specifications for a programming model that will reduce the complexity involved in writing software for multi-core chips. Separately, startup chip designer Adapteva earlier this month announced the multicore Epiphany processor, which is designed to accelerate applications in servers and low-power devices such as smartphones and tablets.

IDG News Service contributed to this story.

Follow Bob on Twitter for more on network research news

Read more about data center in Network World's Data Center section.