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News

  • AMD on rebound, says CEO

    AMD may have fallen behind Intel in manufacturing efficiencies, but product innovations will help it rebound, Hector Ruiz, AMD’s chairman and CEO, said at the company’s recent annual shareholder meeting.

  • Otellini’s lame apology speaks volumes about Intel

    The leading quote from last week’s news comes from Intel CEO Paul Otellini: “We’re doing product refreshes every two years, which is the model we invented and then stopped doing after Pentium 4, shame on us,” Otellini said. “We fell off it — mea culpa, we screwed up — and now we’re back on that pace.”

  • Cosy dealings with Intel set to cost Dell dearly

    I wrote a column in 2005 called How will Dell Offset the Loss of Intel’s Generosity? In it, I asserted that Dell needed to overhaul its strategy and focus to make up for the coming loss of Intel’s ... oh, call it what you like, price supports, subsidies, loyalty bonuses, or what business calls MDF (market development funds).

  • Intel profit falls

    Still reeling from the effects of a reorganisation that included heavy lay-offs, Intel reported a profit of US$1.5 billion for the October-December financial quarter, down 39% on the same period last year.

  • Sun, Intel announce server pact

    Sun Microsystems has announced an alliance with Intel, a move that will greatly expand Sun’s involvement with the chip maker and continue its slow and long embrace of the x86 world.

  • Legal stoush looms between Intel and Transmeta

    Intel’s legal staff might as well buy homes in Delaware. That’s the venue for AMD’s anti-trust action against Intel. This month, Transmeta petitioned the Delaware Federal District Court to find that Intel has violated ten of Transmeta’s patents. The killer patent of the group is the one granted to Transmeta in August. It relates to adaptive power control, which Intel claims to have mastered in its Core micro-architecture.

  • Getting to the core of the processor wars

    Let me ask you: if your wildest dreams were realised, how many cores per CPU would you have in your servers, workstations and power desktops right now? How much Level 2 cache memory would you have in each core, or would you rather it be shared amongst the cores? Would you rather have memory controllers for each pair of cores that access a set-aside block of memory, or one memory controller that sees the entire address space?

  • Intel boasts three Ts

    One teraflop, one terabyte and one terabit per second — that’s the sort of performance Intel is promising future processors will deliver.

  • The super information super highway

    Was anyone else surprised to learn that BBC TV presenters with “significant brain injuries” aren’t too dissimilar from TV presenters that don’t have such damage?

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